Sfoglia per Correlatore LAZZERI, ELIA
Mostrati risultati da 1 a 5 di 5
Automated assembly-level mitigation of transient Execution Attacks using diversified code variants and genetic search
2025/2026 GIORDANELLI, GABRIELE
A cross-layer Kernel-level fault emulation framework for processor-based systems
2024/2025 CARBONETTI, ANDREA
An experimental analysis of hardware data prefetching algorithms in out-of-order RISC-V processors
2025/2026 Logallo, Nunzio
A lightweight, soft real-time trusted execution environment for constrained RISC-V systems
2024/2025 Fullin, Edoardo
The never ending fight between microarchitectural optimizations and vulnerabilities
2024/2025 Meinardi, Marco
| Fulltext | Data | Tipo | Titolo | Autore (i) |
|---|---|---|---|---|
| 2026-03-26 | Tesi di laurea Magistrale | Automated assembly-level mitigation of transient Execution Attacks using diversified code variants and genetic search | GIORDANELLI, GABRIELE | |
| 2026-03-26 | Tesi di laurea Magistrale | A cross-layer Kernel-level fault emulation framework for processor-based systems | CARBONETTI, ANDREA | |
| 2026-03-26 | Tesi di laurea Magistrale | An experimental analysis of hardware data prefetching algorithms in out-of-order RISC-V processors | Logallo, Nunzio | |
| 2026-03-26 | Tesi di laurea Magistrale | A lightweight, soft real-time trusted execution environment for constrained RISC-V systems | Fullin, Edoardo | |
| 2026-03-26 | Tesi di laurea Magistrale | The never ending fight between microarchitectural optimizations and vulnerabilities | Meinardi, Marco |
Mostrati risultati da 1 a 5 di 5
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