An integrated control scheme for dynamic voltage restorer to limit downstream fault currents

This thesis is the main results from a MSc project under the research plan at Politecnico di Milano. The main topic in the thesis is design an integrated control scheme for a dynamic voltage restorer (DVR) to limit downstream fault currents. During the thesis knowledge is gathered about power and voltage quality issues, power electronic solutions for voltage quality improvement, design and control of a DVR either connected at the low voltage or the medium voltage level. In addition researches are performed in order to find out a reliable and economically justified strategy of the fault current limiting function in order to integrate with the DVR. The DVR is a custom power system device with the principal duty to protect sensitive electric consumers against voltage dips and surges in the medium and low voltage distribution which is series connected in the grid. Voltage dips can in many cases be the most considerable power quality problem, because they can occur very frequently and lead to a load tripping. Voltage dip depth, duration and phase jump depend on the location of the fault and the protection equipment used. The thesis first presents an introduction to relevant power quality issues, thereafter possible solutions and strategies including employing a DVR in order to compensate the voltage quality problems are investigated. Consequently the operation principle and the elements in a DVR are described. The advantages and disadvantages of inserting a DVR in the distribution system (either the medium voltage or low voltage) are discussed. Then different topologies and configurations of the VSC are investigated. The four DVR topologies, which are presented and compared, are: • Topologies with stored energy devices: – Constant DC-link voltage; – Variable DC-link voltage; • Topologies with power from the supply: – Supply side connected shunt converter; – Load side connected shunt converter; Different proposed compensation methods in the literatures to employ a DVR, including “pre-sag compensation method, the method by which the phases of the load voltages are unchanged”, “in-phase compensation method, the method by which the injected voltage is in-phase with supply voltage” and “energy optimal compensation method, the method by which the injected voltage is perpendicular to the load current” are reviewed. Consequently a comparison between these scenarios is treated and their pros and cons are expressed. Also the control concepts of the DVR are described. Then the control system in 3-phase applications is implemented in a rotating dq-reference frame, which gives a very good compensation of the positive sequence component and a damping of the negative sequence. Zero sequence components are not detected or compensated with the chosen control method. A set of simulations in Matlab environment for normal operation conditions and voltage dip occurrence have been carried out. The results indicate that the DVR can compensate different kind of loads, however non-linear load can lead to oscillations in the line-filter of the DVR and thereby an increased harmonic distortion of the load voltages. The dynamic simulations with the LV-DVR indicate an acceptable compensation of symmetrical voltage dips. In most cases the DVR is capable of restoring the load voltages within a very short time. During the transition phases load voltage oscillations can be generated and during the return of the supply voltages short time over-voltages can be generated by the DVR. Both of the described events can be a potential problem for sensitive loads. Unfortunately faults do occur on the distribution system downstream of the DVR. Faulted point could be anywhere on the feeder connecting the DVR and the protected load, considering the fact that DVR is series connected to the faulted feeder, a large current will pass through the injection transformer and into the DVR converter. Without proper considerations, the high short circuit current could easily damage the injection transformer, destroy insulators and more important break power electronic switches which are more sensitive to high current. In order to isolate the downstream fault, one can of course rely on the circuit breakers installed upstream of the DVR. Depending on algorithm of protection coordination and the exact location/nature of the fault, the fault clearing action may typically take some cycles. However, fault current during these cycles can have damaging effect on the power switching devices within the DVR. Moreover, for the other loads connected to the parallel feeders, the voltage sag event due to fault current can be harmful as it can cause equipment on these feeders to fail, malfunction, or shut down. Voltage sag on the three-phase system is not uniformly distributed on different phases and oftentimes there is significant accumulation of voltage sags on one phase. Also taking into account that some electrical consumers are more sensitive with respect to voltage disturbance rather than other consumers, DSOs would be interested in installing series voltage compensator only at single phase configuration. Therefore during the chapter three the emphasis is put on implementing the fault current limiting function for a single-phase DVR. However the obtained results are capable to be extended to three-phase applications without the loss of generality. In order to limit fault currents through a DVR some strategies are presented in literatures. During the chapter three the operation principle of the most presented strategies in order to limit the short circuit current are investigated. The key idea of these solutions is to effectively insert series impedance between the source and the fault location. It should be highlighted that the duty of the DVR under such a downstream fault condition is to limit the fault current until such time when the protection system upstream of the DVR operates. Therefore we may say that the DVR is not supposed to replace the protection system, it only provides a short-term action to limit the fault current. A comprehensive fault analysis and computer simulations were done on the LV-distribution systems. Then the short circuit current waveform and its transient behavior are considered. The fault detection/recovery methods are investigated. Thereafter different configurations in order to limit the fault current including active and passive strategies, their feasibility and reliability together with economic considerations are discussed. Active solutions are applicable in impedance mode and reactance mode. Presence of communication channel is an important requirement in order to use active FCL strategies. The treated strategies in the literatures in order to implement the FCL function for a DVR through passive elements including “Using the impedance of the injection transformer” and “Using the filter reactance” are analyzed and simulated. Thereafter a new configuration in order to limit the short circuit current is proposed. This configuration is based on taking the benefits of both bypassing the DVR during the faulted condition and implementing DVR FCL function. At the end a comparison between the effectiveness of different strategies is expressed too.

Questa tesi è il risultato principale di un progetto MSc sotto il piano di ricerca presso il Politecnico di Milano. L'argomento principale della tesi è la progettazione di un sistema di controllo integrato per un ripristino dinamico di tensione (DVR) per limitare le correnti di guasto a valle. Durante la tesi si raccoglie la conoscenza di problemi di potenza e di tensione, soluzioni elettroniche di potenza per il miglioramento della qualità della tensione, progettazione e controllo di un DVR collegato a bassa tensione oa media tensione. Inoltre, vengono eseguite ricerche per trovare una strategia affidabile e economicamente giustificata della funzione di limitazione della corrente di guasto per integrarsi con il DVR.