Large-scale, defect-free, micro- and nano semiconductor circuits represent the nexus between electronic and photonic components. Semiconductors nanowires exhibit superior and configurable electronic properties. From this reason their growth has been tackled with a plethora of techniques aiming at the production of controlled structures, matching the needs of high yields, scalability and material quality. In this work, the natural instability of thin solid films, known as solid state dewetting, has been exploited, patterning solid thin semiconductor films, to precisely and independently control size, position, and direction of mono-crystalline, atomically smooth faceted, wires on silicon oxide insulator. During this master thesis, templated solid state dewetting has been used, as fabrication method, to create transistors based on silicon dewetted crystal wires. The final goal of this project is to show the peculiar morphological and electrical properties of the dewetted silicon wires comparing them to similar structures achieved by using a top-down fabrication method. In this work, Si wires of different aspect ratios have been obtained optimizing the pattern of silicon on insulator samples of 12 nm thickness realized by using the electron beam lithography and the reactive ion etching. It has been possible to study the mono-crystal structure of the dewetted wires analyzing scanning transmission electrons images. A doping procedure, involving phosphorus spin-on dopant and rapid thermal annealing, has been performed on silicon on insulator flat samples to optimize the process of doping the silicon nanowires. The diffusion mechanism of phosphorus in a silicon on insulator substrate and the activation energy have been studied by electrical measurements, done by using the 4-probes method and also Hall bar structures, and by the observation of the concentration profiles provided by ToF-SIMS analysis. A n-type field effect transistor, that works in enhancement mode, has been obtained and electrical characterized. It has been possible to acquire the I-V curves to evaluate the trans-conductance of the order of micro siemens per wires.
I nanowires a semiconduttore presentano ottime proprietà che si possono facilmente adattare a differenti applicazioni elettroniche. Per questo motivo numerose tecniche finalizzate alla produzione di strutture controllate, rispondenti alle esigenze di elevata resa, scalabilità e qualità dei materiali, hanno contribuito allo sviluppo dei nanowires. In questo lavoro, l’instabilità naturale dei film sottili, nota come dewetting allo stato solido, è stata impiegata per controllare, con precisione ed in modo indipendente, dimensione, posizione e direzione di wires di silicio monocristallini. Il fenomeno di dewetting allo stato solido è stato utilizzato come metodo di fabbricazione per la realizzazione di transistor basati su wires cristallini di silicio. L’obbiettivo di questo progetto consiste nel mostrare le proprietà morfologiche ed elettriche proprie dei dewetted wires confrontandoli con simili strutture ottenute con un metodo top-down. In questo lavoro sono stati ottenuti wires di diverse dimensioni attraverso l’ottimizzazione dei pattern effettuati su campioni costituiti da un film di silicio di 12 nm posto sopra ad un film di SiO2. I pattern sono stati realizzati attraverso la litografia elettronica. È stato possibile studiare la struttura monocristallina dei dewetted wires attraverso le immagini effettuate con un microscopio elettronico a trasmissione. Prima di procedere con la fabbricazione del transistor, il processo di drogaggio di un film sottile di silicio depositato su ossido è stato ottimizzato. Il composto chimico spin-on dopant, contenente fosforo, è stato depositato sui campioni; la diffusione del drogante è stata attivata riscaldando i campioni ad alta temperatura in modo rapido. Attraverso le misure elettriche e grazie alle analisi Tof-SIMS è stato analizzato il meccanismo di diffusione del fosforo nel silicio. Un transistor drogato n a effetto campo è stato fabbricato ed elettricamente caratterizzato. Sono state acquisite le curve I-V del transistor, al variare della tensione di gate, e si è valutata la transconduttanza di ciascun wire.
Fabrication and characterization of engineered dewetted Si-based transistors
BARRI, CHIARA
2018/2019
Abstract
Large-scale, defect-free, micro- and nano semiconductor circuits represent the nexus between electronic and photonic components. Semiconductors nanowires exhibit superior and configurable electronic properties. From this reason their growth has been tackled with a plethora of techniques aiming at the production of controlled structures, matching the needs of high yields, scalability and material quality. In this work, the natural instability of thin solid films, known as solid state dewetting, has been exploited, patterning solid thin semiconductor films, to precisely and independently control size, position, and direction of mono-crystalline, atomically smooth faceted, wires on silicon oxide insulator. During this master thesis, templated solid state dewetting has been used, as fabrication method, to create transistors based on silicon dewetted crystal wires. The final goal of this project is to show the peculiar morphological and electrical properties of the dewetted silicon wires comparing them to similar structures achieved by using a top-down fabrication method. In this work, Si wires of different aspect ratios have been obtained optimizing the pattern of silicon on insulator samples of 12 nm thickness realized by using the electron beam lithography and the reactive ion etching. It has been possible to study the mono-crystal structure of the dewetted wires analyzing scanning transmission electrons images. A doping procedure, involving phosphorus spin-on dopant and rapid thermal annealing, has been performed on silicon on insulator flat samples to optimize the process of doping the silicon nanowires. The diffusion mechanism of phosphorus in a silicon on insulator substrate and the activation energy have been studied by electrical measurements, done by using the 4-probes method and also Hall bar structures, and by the observation of the concentration profiles provided by ToF-SIMS analysis. A n-type field effect transistor, that works in enhancement mode, has been obtained and electrical characterized. It has been possible to acquire the I-V curves to evaluate the trans-conductance of the order of micro siemens per wires.File | Dimensione | Formato | |
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2019_12_Barri.pdf
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https://hdl.handle.net/10589/151329