Low-power microcontrollers (MCU) are simple yet flexible devices employed in several scenarios, from wearable Smart Devices to Industrial Applications. Despite their constrained resources they still require an adequate protection as previous attacks have proven to yield critical damage to infrastructures and people. In this context Remote Attestation (RA) can be a valid tool allowing to remotely verify the integrity of the device's memory. This challenge-and-response protocol has been an active research direction for decades, with several variations and improvements. However most RA protocols require interrupts to be disabled for the entire memory attestation. This limit is painful but necessary as interrupts are a potential exploit for malware that tries to escape detection when the Attestation begins. At the same time giving up on interrupts is not acceptable when it comes to real-time systems that need to be responsive at all time. While some solutions exist they are either not suitable for low-power Microcontrollers or are inherently stochastic and offer modest detection probabilities in some scenarios. In this work we propose a new approach based on Performance Counters to perform Interruptible Remote Attestation on low-end microcontrollers. This approach relies on some event counters to infer when malware has effectively relocated at attestation time, preventing it from successfully escaping detection. We have collected experimental evidence suggesting that even some simple Machine Learning models are able to classify these counters and spot malware that is tampering with Attestation. Finally we estimated the computational overhead introduced by our method, showing its moderate extent in the best scenarios.
I microcontrollori (MCU) a basso consumo sono dispositivi semplici ma abbastanza flessibili da essere di utilità in molti scenari, da Smart Devices ad applicazioni industriali. Nonostante i loro limiti in termini di risorse, essi richiedono una protezione adeguata visti gli attacchi ai loro danni che in passato hanno causato danni ad infrastrutture e persone. In tale contesto l'Attestazione Remota (RA) può essere un valido strumento per verificare in remoto l'integrità della memoria del dispositivo. Questo protocollo di tipo sfida-e-risposta viene usato da decenni, con numerose varianti e migliorie. Ciononostante la maggior parte dei protocolli di RA richiede la disabilitazione degli interrupt per tutta la durata dell'attestazione. Questa limitazione è un peso necessario in quanto gli interrupt rappresentano potenziali mezzi che permottono ad eventuali malware di evitare la rilevazione all'inizio di un nuovo protocollo di RA. Allo stesso tempo rinunciare agli interrupt non è accettabile se si opera in contesti real-time che richiedono sistemi responsivi in ogni istante. Sebbene alcune soluzioni siano state proposte, esse sono o non applicabili a MCU di bassa fascia o sono intrinsecamente stocastiche e offrono probabilità di detezione del malware limitate. In questo articolo proponiamo un nuovo approccio basato su Contatori di Performance per permettere una RA Interrompibile su microcontrollori di bassa fascia. Tale metodo si appoggia a dei contatori di eventi per inferire quando un malware ha effettivamente cambiato posizione in memoria durante l'attestazione, impedendogli di sfuggire alla detezione. Abbiamo raccolto dati sperimentali, ed essi suggeriscono che anche dei semplici modelli statistici basati su Machine Learning sono in grado di classificare questi contatori e rilevare quando un malware ha interferito con l'attestazione. Infine abbiamo stimato l'overhead coputazionale introdotto dal nostro metodo, mostrando come sia modesto nei migliori scenari.
Interruptible remote attestation via performance counters
LI CALSI, DAVIDE
2021/2022
Abstract
Low-power microcontrollers (MCU) are simple yet flexible devices employed in several scenarios, from wearable Smart Devices to Industrial Applications. Despite their constrained resources they still require an adequate protection as previous attacks have proven to yield critical damage to infrastructures and people. In this context Remote Attestation (RA) can be a valid tool allowing to remotely verify the integrity of the device's memory. This challenge-and-response protocol has been an active research direction for decades, with several variations and improvements. However most RA protocols require interrupts to be disabled for the entire memory attestation. This limit is painful but necessary as interrupts are a potential exploit for malware that tries to escape detection when the Attestation begins. At the same time giving up on interrupts is not acceptable when it comes to real-time systems that need to be responsive at all time. While some solutions exist they are either not suitable for low-power Microcontrollers or are inherently stochastic and offer modest detection probabilities in some scenarios. In this work we propose a new approach based on Performance Counters to perform Interruptible Remote Attestation on low-end microcontrollers. This approach relies on some event counters to infer when malware has effectively relocated at attestation time, preventing it from successfully escaping detection. We have collected experimental evidence suggesting that even some simple Machine Learning models are able to classify these counters and spot malware that is tampering with Attestation. Finally we estimated the computational overhead introduced by our method, showing its moderate extent in the best scenarios.File | Dimensione | Formato | |
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https://hdl.handle.net/10589/196471