Side-channel attacks represent a persistent threat to the security of cryptographic devices, exploiting physical leakages, such as power consumption, to retrieve secret information. These attacks fall into two categories: non-profiled attacks, which rely on synthetic models of device behavior, and profiled attacks, which build highly accurate, data-driven models from a target device instance. This thesis presents a comprehensive methodology to address both of these threats through novel defensive paradigms, and a novel attack methodology for security assessment. We present a novel countermeasure, Computational Interleaving, characterized by the temporal interleaving of cryptographic computations. By executing the genuine operations alongside fake ones using a device-dependent key, this approach provides protection against both profiled and non-profiled attacks. It systematically makes profiled models non-portable across devices and establishes robust resistance against first-order non-profiled attacks, all while demonstrating superior resource efficiency compared to alternative solutions. To add to this defensive framework, we also introduce a powerful single-trace horizontal attack. This technique requires only a single execution measurement and operates without prior knowledge of the algorithm’s implementation details. It automatically detects the reuse of intermediate values within iterative procedures, a common feature in cryptographic primitives, to extract secret information. We validate its effectiveness on a constant-time square-and-multiply-always RSA implementation, successfully retrieving the entire secret exponent from a single trace where traditional attacks would fail. Finally, to bridge the gap between hardware and software, we present a compiler-based methodology to automate the application of the Computational Interleaving countermeasure. This approach eliminates the significant engineering effort typically required for software hardening. Experimental validation on an ARM Cortex-M4 target confirms that this automated approach effectively neutralizes both Correlation Power Analysis and Template Attacks, rendering it suitable for real-world software implementations.
Gli attacchi side-channel rappresentano una minaccia per la sicurezza dei dispositivi crittografici, sfruttando informazioni fisiche, come il consumo di potenza, per recuperare segreti crittografici. Questi attacchi si dividono in due categorie: attacchi non-profilati, che si basano su modelli sintetici del comportamento del dispositivo, e attacchi profilati, che costruiscono modelli data-driven estremamente accurati a partire da un’istanza specifica del dispositivo target. Questa tesi presenta una metodologia completa per affrontare entrambe queste minacce attraverso paradigmi difensivi innovativi e una nuova metodologia di attacco per la valutazione della sicurezza. Presentiamo una contromisura innovativa, il Computational Interleaving, caratterizzata dall’interleaving temporale delle computazioni crittografiche. Eseguendo delle operazioni autentiche insieme a quelle false utilizzando una chiave dipendente dal dispositivo, questo approccio fornisce protezione sia contro gli attacchi profilati che contro quelli nonprofilati. Rende i modelli profilati non portabili tra dispositivi diversi e stabilisce una solida resistenza contro gli attacchi non-profilati di primo ordine, il tutto dimostrando un’efficienza superiore in termini di risorse rispetto a soluzioni alternative. In aggiunta a questo framework difensivo, introduciamo anche un potente attacco orizzontale a traccia singola. Questa tecnica richiede una sola misurazione dell’esecuzione e opera senza una conoscenza preliminare dei dettagli implementativi dell’algoritmo. Essa rileva automaticamente il riutilizzo di valori intermedi all’interno di algoritmi iterativi, una caratteristica comune nelle primitive crittografiche, per estrarre informazioni segrete. Ne validiamo l’efficacia su un’implementazione RSA di tipo square-and-multiply-always a tempo costante, riuscendo a recuperare l’intero esponente segreto da una singola traccia, dove gli attacchi tradizionali fallirebbero. Infine, per colmare il divario tra hardware e software, presentiamo una metodologia basata su compilatore per automatizzare l’applicazione della contromisura di Computational Interleaving. Questo approccio elimina lo sforzo ingegneristico significativo tipicamente richiesto per l’hardening del software. La validazione sperimentale su un target ARM Cortex-M4 conferma che questo approccio automatizzato neutralizza efficacemente sia la Correlation Power Analysis sia i Template Attacks, rendendolo adatto per le implementazioni software nel mondo reale
Synthetic models for side channel attack analysis and countermeasure development
Piacentini, Isabella
2025/2026
Abstract
Side-channel attacks represent a persistent threat to the security of cryptographic devices, exploiting physical leakages, such as power consumption, to retrieve secret information. These attacks fall into two categories: non-profiled attacks, which rely on synthetic models of device behavior, and profiled attacks, which build highly accurate, data-driven models from a target device instance. This thesis presents a comprehensive methodology to address both of these threats through novel defensive paradigms, and a novel attack methodology for security assessment. We present a novel countermeasure, Computational Interleaving, characterized by the temporal interleaving of cryptographic computations. By executing the genuine operations alongside fake ones using a device-dependent key, this approach provides protection against both profiled and non-profiled attacks. It systematically makes profiled models non-portable across devices and establishes robust resistance against first-order non-profiled attacks, all while demonstrating superior resource efficiency compared to alternative solutions. To add to this defensive framework, we also introduce a powerful single-trace horizontal attack. This technique requires only a single execution measurement and operates without prior knowledge of the algorithm’s implementation details. It automatically detects the reuse of intermediate values within iterative procedures, a common feature in cryptographic primitives, to extract secret information. We validate its effectiveness on a constant-time square-and-multiply-always RSA implementation, successfully retrieving the entire secret exponent from a single trace where traditional attacks would fail. Finally, to bridge the gap between hardware and software, we present a compiler-based methodology to automate the application of the Computational Interleaving countermeasure. This approach eliminates the significant engineering effort typically required for software hardening. Experimental validation on an ARM Cortex-M4 target confirms that this automated approach effectively neutralizes both Correlation Power Analysis and Template Attacks, rendering it suitable for real-world software implementations.| File | Dimensione | Formato | |
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https://hdl.handle.net/10589/249399