Study of a day-0 front-end solution for the DSSC detector of the european X-ray free electron laser

The recent development of Free Electron Lasers based on the Self-Amplified Spontaneous Emission technique has allowed a considerable reduction of the emitted wavelength. Currently it is possible to provide coherent light pulses in the X and γ-regime with remarkable brilliance and short pulse duration. Having laser sources at these short wavelengths is useful for various applications in a wide range from medical diagnostic to biology and physical studies. A European X-ray Free Electron Laser (European XFEL) is currently under construction in the Hamburg area, Germany. The first lasing operation is expected for the 2017. Thanks to its superconducting linear accelerator, European XFEL will be able to provide the highest pulses rate ever obtained, with X-ray pulses only 220ns apart and grouped in bunches of 2700 flashes each. The energy range can be tuned between 206.6eV and 12.4keV, relating to a wavelength span from 0.1nm to 6nm. The Full Width at Half Maximum (FWHM) of the pulses will be less than 100fs, hence providing an extremely high peak brilliance. For the European XFEL, there are several imagers under development for the X-ray photon detections, including single-point, 1-D and 2-D detectors. As one of the 2-D imagers, the DSSC project aims to provide wide energy coverage with single photon detection capability thanks to its very low noise. To achieve this result a novel detector structure with a compressive characteristic based on the DEPFET concept is under development by the DSSC consortium. The high gain for small collected charge and the compression for large signals will provide both desired features of single photon detection capability and wide dynamic range. The imager will be composed of 1024×1024 pixels, each one bump bonded to a dedicated read out channel. Full parallel read out is necessary due to the high frame rate. Each channel will contain a fast, low noise analog front-end, an 8-bit analog-to-digital converter and a static RAM to store the information. Data will be sent out from the focal plane during the long gaps between subsequent macro bunches. The aim of my doctoral research has been the study, design and implementation of an alternative analog front-end for the DEPFET Sensor with Signal Compression (DSSC) detection system in the framework of the imagers’ development for the European XFEL. In spite of its capability in high dynamic range and low noise performance, the manufacturing of the DEPFET sensor needs a sophisticated processing technology which requires relatively long manufacturing time. According to the mentioned complexity, it was evaluated to have an alternative sensor matrix, with its corresponding front-end, as Day-0 solution. A Day-0 solution is here intended as a solution characterized not by the best performance of the DEPFET, but available in a shorter time to allow first beam tests and experiments. Therefore, the name of “Day-0 solution” refers to a detection system available for the first day operation of the European XFEL facility. The alternative sensor is made of mini Silicon Drift Detector (mini-SDD) and the compression behavior is obtained from the front-end on the readout ASIC and not by the silicon sensor, as in the DEPFET. In the Day-0 solution, the DEPFET is removed and replaced still by a PMOSFET transistor, but now belonging to the ASIC chip and realized with the same IBM technology of the following stages of the ASIC. The PMOSFET is designed in a way to provide low noise and a compression characteristic close to the one of the DEPFET-based solution. In fact, this alternative front-end input stage should still provide a non-linear amplification of the detected signal. Accordingly, the replacement of the DEPFET with this stage should keep as much as possible equal the following architecture adopted for the processing electronics. This goal is achieved by forcing the input PMOSFET, which is not equipped by an intrinsic non-linear gain like the DEPFET, to operate in a non-linear mode with a signal compression induced by the signal itself. A simple way to achieve this mechanism is to put a resistor in series with the PMOSFET and to connect the other side of the resistor to the virtual ground of the filter. The PMOSFET has to be operated in the triode regime: in this way increasing of the transistor current due to an increase of the detector signal (lowering of the anode voltage) increases the voltage drop across the resistor and consequently decreases the absolute value of the drain-source voltage of the PMOSFET. This pushes the transistor to operate deeper in the triode regime, reducing consequently its gain. A non-linear characteristics of the PMOSFET operated in this way can be therefore expected. The same analog filter designed of DEPFET solution is also used in Day-0 approach, keeping the rest of analog readout channel equal. The circuit, called Flip Capacitor Filter (FCF), processes the current signal of the Day-0 front-end to achieve high frame rates still providing excellent noise performances. There are some differences between DEPFET approach and Day-0 solution in the DSSC project. First of all the manufacturing of the DEPFET sensor with signal compression needs a complicated manufacturing process, while the sensor of the Day-0 solution has a simpler manufacturing process. Second, in the DEPFET approach the detection and amplification of the signal will be achieved in one level. Therefore the parasitic capacitance associated with the anode can be minimized and a very low noise can be obtained. In the Day-0 solution the parasitic capacitance at the input of the ASIC is the combination of the anode capacitance of the detector, gate capacitance of the PMOSFET and the capacitance associated with the connection between them and it is much bigger than the anode capacitance of the DEPFET. In the other hand, the external transconductance of the DEPFET sensor is much smaller in compare with the Day-0 solution. Therefore, in the Day-0 solution a tradeoff between the input capacitance and transconductance of the PMOSFET can be made to obtain a performance as close as possible to the DEPFET approach. The first Chapter of this thesis describes the working principle of Free Electron Lasers, comparing them to standard light sources. The European XFEL project is also introduced in its main aspects and characteristics. The second Chapter introduces the imagers’ development for the facility, and focuses on 2-D systems. Three different projects are under development for 2-D X-ray detection. In this chapter, a short introduction for each 2-D imager is presented. In the third Chapter, DSSC project is described in detail. This chapter introduces the DEPFET sensor, its corresponding front-end and signal processing. Also, the concept of Flip Capacitor Filter as the main analog filter is explained. The fourth Chapter introduces the Day-0 front-end solution and its design and implementation issues with the same analog filter (FCF filter) on a test mini ASIC. Measurements of mini ASIC are shown in the fifth Chapter, both for the ASIC alone and coupled to a Silicon Drift Detector. In the sixth Chapter, the implementation of Day-0 solution inside different ASICs which were recently submitted for fabrication is introduced. The main part of this chapter was dedicated to the improved design of Day-0 front-end implemented in a mini-matrix chip and in an improved mini ASIC. Also, this chapter includes some preliminary measurements of the improved mini ASIC. The conclusion and discussion of the Day-0 solution are presented in the last Chapter.