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2017-07-27 Tesi di laurea Magistrale A distributed framework supporting runtime autotuning for HPC applications DI MARCO, CRISTIANO
2017-12-22 Tesi di laurea Magistrale A hybrid autotuning framework for performance optimization of heterogeneous systems AMIRI, PUYAFANI-DISFANI, MAHDI
2017-12-21 Tesi di laurea Magistrale A machine learning methodology based on performance monitoring counters for process classification BRUNATO, ANDREA
2019-12-18 Tesi di laurea Magistrale Acceleration of convolutional neural networks on FPGAs based on fusion of multiple layers INDIRLI, FABRIZIO
2016-09-29 Tesi di laurea Magistrale Analysis of approximation techniques for parallel computing applications DE PASQUALE, SILVIO VALERIO
2017-04-28 Tesi di laurea Magistrale Application autotuning on parallel distributed architectures CECERE, MONICA
2011-12-20 Tesi di laurea Magistrale Application specific hierarchical network on chip design based on floorplanning information TAYEBANI, KOSAR
2019-12-17 Tesi di laurea Magistrale Code generation for hybrid hardware-software mapping of deep convolutional neural networks on dataflow neural processing units BUSCHINI, ALESSANDRO
2016-12-20 Tesi di Dottorato Compiler autotuning using machine learning techniques ASHOURI, AMIR HOSSEIN
2012-12-20 Tesi di laurea Magistrale Design space exploration methodology for compiler parameters in VLIW processors ASHOURI, AMIR HOSSEIN
2014-12-18 Tesi di Dottorato Design space exploration of openCL applications on heterogeneous parallel platforms PAONE, EDOARDO
2016-09-29 Tesi di laurea Magistrale Efficient OpenCL application autotuning for heterogeneous platforms ERDEM, AHMET
2020-12-21 Tesi di Dottorato Exploration and mapping of deep neural networks to low-power hardware accelerators and FPGAs Erdem, Ahmet
2018-10-03 Tesi di laurea Magistrale Hardware accelerators of convolutional neural networks. Fused-layer approach BABIC, DANIJELA
2022-07-22 Tesi di laurea Magistrale A HW/SW co-design framework for TinyML acceleration BRUNO, NUNZIO MARIA ALBERTO
2017-12-21 Tesi di laurea Magistrale Information-leakage analysis based on hardware performance counters FUSI, MATTEO MARIA
2016-12-20 Tesi di Dottorato Near-threshold computing with performance guarantees for manycore architecture STAMELAKOS, IOANNIS
2022-12-21 Tesi di laurea Magistrale An online teaching approach to computer architecture Cazzaniga, Simone Shawn
2018-07-25 Tesi di laurea Magistrale Parallelized convolutions for embedded ultra low-power deep learning architectures CUNIAL, LORENZO
2022-12-20 Tesi di laurea Magistrale A performance analysis method for CNN inference on hardware architectures CECINI, MATTEO
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