Sfoglia per Relatore
Mostrati risultati da 1 a 4 di 4
Analog front-end circuits for high-resolution wide-band ADCs
2023/2024 Scaletti, Lorenzo
Analysis and design of a low-noise 254ps-response-time FVF-based LDO voltage regulator in 28-nm CMOS for next-generation wireless ADCs
2023/2024 ALBEZZANO, ENRICO
Analysis and design of an energy-efficient ring-amp-based interstage amplifier in 28nm CMOS for an 11.5-bit 2GS/s TI Pipeline SAR ADC
2022/2023 Ceroni, Alessia
Analysis and implementation of dynamic weighted averaging technique in 28 nm CMOS for an high-speed, low-power coarse-fine NS-SAR ADC
2024/2025 COZZOLINO, DARIO LUCA
| Fulltext | Data | Tipo | Titolo | Autore (i) |
|---|---|---|---|---|
| 2024-05-15 | Tesi di Dottorato | Analog front-end circuits for high-resolution wide-band ADCs | Scaletti, Lorenzo | |
| 2024-12-11 | Tesi di laurea Magistrale | Analysis and design of a low-noise 254ps-response-time FVF-based LDO voltage regulator in 28-nm CMOS for next-generation wireless ADCs | ALBEZZANO, ENRICO | |
| 2023-10-05 | Tesi di laurea Magistrale | Analysis and design of an energy-efficient ring-amp-based interstage amplifier in 28nm CMOS for an 11.5-bit 2GS/s TI Pipeline SAR ADC | Ceroni, Alessia | |
| 2025-07-22 | Tesi di laurea Magistrale | Analysis and implementation of dynamic weighted averaging technique in 28 nm CMOS for an high-speed, low-power coarse-fine NS-SAR ADC | COZZOLINO, DARIO LUCA |
Mostrati risultati da 1 a 4 di 4
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