Sfoglia per Relatore
Mostrati risultati da 1 a 13 di 13
Crosstalk effects analysis and solutions in FPGA-based time-to-digital converters
2019/2020 LOCRI, GIANLUCA
Digital architectures for real-time multi-channel histogramming at high-performance
2019/2020 Costa, Andrea
Digital filters for Delta-Sigma ADCs at reduced latency and settling time for current and voltage sensing applications
2023/2024 ROMANO, MATTIA
Experimental comparison of voltage-mode and time-based timing and energy read-out circuits
2022/2023 BERNASCONI, LUCA
Fully FPGA-based time-to-digital converter for 3D (X, Y, t) cross delay-line detection systems
2018/2019 REALE, ANTONIO
Hardware verification of a high-performance digital electronics system infrastructure through Python-based methodology
2019/2020 Bucci, Luca
High resolution programmable delay line IP Core based on digital-to-time converter for FPGAs
2021/2022 Cattaneo, Matteo
High speed USB interface for FPGA devices
2019/2020 ALONSO RÁMILA, ANA
High-performance synchronization algorithms for multiple time-to-digital converters
2019/2020 MEANTI, GIULIA
High-Performance Time-to-Digital Converter IP-Core for Xilinx Ultrascale/Ultrascale+ FPGAs
2021/2022 Consonni, Mattia
Multi-channel high-resolution digital-to-time pattern generator IP-core for FPGAs and SoCs
2020/2021 FERRARESI, FEDERICO
Multi-channel shift clock fast counter time-to-digital converter for 28-nm 7-series Xilinx devices
2023/2024 TOIA, MATTEO
Time-to-digital converter IP-core for extremely-large number of channels designed for Xilinx FPGAs
2019/2020 Ticozzi, Giovanni
Mostrati risultati da 1 a 13 di 13
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