Sfoglia per Correlatore GARZETTI, FABIO

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Fulltext Data Tipo Titolo Autore (i)
2017-10-03 Tesi di laurea Magistrale All programmable SoC with hardware and software programmability SURY, RAFFAELE ALESSANDRO
2020-10-02 Tesi di laurea Magistrale Crosstalk effects analysis and solutions in FPGA-based time-to-digital converters LOCRI, GIANLUCA
2018-12-20 Tesi di laurea Magistrale Design and implementation of a FPGA-based high performance digital pulse width modulator DI LALLA, LORENZO
2024-04-09 Tesi di laurea Magistrale Digital filters for Delta-Sigma ADCs at reduced latency and settling time for current and voltage sensing applications ROMANO, MATTIA
2024-04-09 Tesi di laurea Magistrale Experimental comparison of voltage-mode and time-based timing and energy read-out circuits BERNASCONI, LUCA
2024-10-10 Tesi di laurea Magistrale Exploring front-end design and synchronization techniques for next-gen FPGA-based TDCs with enhanced precision and scalability Front-End Design and Synchronization Techniques for Next-Gen FPGA-Based TDCs with Enhanced Precision and Scalability FIUMICELLI, GABRIELE
2019-12-18 Tesi di laurea Magistrale Fully FPGA-based time-to-digital converter for 3D (X, Y, t) cross delay-line detection systems REALE, ANTONIO
2018-10-03 Tesi di laurea Magistrale High performance communication interfaces for programmable logic and Linux-based SoC platforms CORNA, NICOLA
2022-10-06 Tesi di laurea Magistrale High resolution programmable delay line IP Core based on digital-to-time converter for FPGAs Cattaneo, Matteo
2020-04-29 Tesi di laurea Magistrale High speed USB interface for FPGA devices ALONSO RÁMILA, ANA
2020-06-06 Tesi di laurea Magistrale High-performance physical-independent address-based communication interface for programmable logic and temporal computing devices RONCONI, ENRICO
2021-04-28 Tesi di laurea Magistrale High-performance synchronization algorithms for multiple time-to-digital converters MEANTI, GIULIA
2022-12-20 Tesi di laurea Magistrale High-Performance Time-to-Digital Converter IP-Core for Xilinx Ultrascale/Ultrascale+ FPGAs Consonni, Mattia
2024-12-11 Tesi di laurea Magistrale Multi-channel shift clock fast counter time-to-digital converter for 28-nm 7-series Xilinx devices TOIA, MATTEO
2018-04-19 Tesi di laurea Magistrale Studio e prima implementazione di un HDL-PLL in FPGA GATTI, LORENZO
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